At Oriole Networks, we are developing disruptive technologies for AI/ML and HPC networking that will revolutionise Data Centers. Our mission is to accelerate training and inference while dramatically reducing energy consumption, enabling a more sustainable computing future.

We are seeking an experienced FPGA Technical Lead to help establish and grow our engineering presence in Bangalore, while working closely with our global team. This role is ideal for someone who remains a hands‑on technical contributor but also thrives in mentoring, onboarding, and developing junior engineers as we scale our India-based organisation.

The successful candidate will drive the development of high‑speed network interfaces between xPUs and our proprietary network technology—delivering both scale‑up and scale‑out interface solutions. You will work iteratively across multiple prototype cycles leading to production‑grade systems. Responsibilities include microarchitecture definition, implementation, verification, and FPGA-based lab validation, as well as close collaboration with software teams.

Responsibilities:

• Define microarchitecture and contribute to architectural decisions in partnership with the broader engineering team

• Provide technical leadership within the growing Bangalore team, including onboarding, mentoring, and guiding junior engineers

• Prepare detailed technical documentation, design reviews, and presentations for internal and external stakeholders

• Perform RTL implementation, synthesis, and timing closure

• Plan and execute unit‑level verification using SystemVerilog

• Deliver and validate FPGA-based lab setups for internal testing and customer trials

• Collaborate with software, systems, and hardware teams to ensure seamless integration of FPGA‑based solutions
  
  

Skills & Experience:

• Extensive hands‑on industry experience in FPGA design for GPU/CPU interfacing and high‑performance networking at 100Gbps+

• Experience with several of the following: UALink, NVLink, PCIe, RDMA, CXL

• Strong understanding of clock‑domain crossing techniques

• Deep knowledge of FPGA tool flows (synthesis, partitioning, place & route, timing analysis)

• Strong proficiency in SystemVerilog/Verilog/VHDL

• Scripting and automation experience (e.g., TCL, Python)

• Experience with verification tools such as Questa, VCS

• Experience with FPGA development suites including Quartus, Vivado, Vitis

• Familiarity with host software interfaces and device drivers

• Experience with embedded systems, including soft processors (MicroBlaze, Nios, RISC‑V) and SoC programming

• Experience working with high‑performance FPGAs such as Xilinx Versal Premium or Intel Agilex 7

• A humble and collaborative mindset, with strong communication skills suitable for mentoring and team development

• Bachelor’s or Master’s degree in electronics engineering, physics, or related fields—or equivalent industry experience